54HC164/74HC164

> AND-Gated (Enable/Disable) Serial Inputs

> Fully Buffered Clock and Serial Inputs

> Direct Clear

> Package Options Include Plastic 

Small-Outline (D) and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and 

Standard Plastic (N) and Ceramic (J)

300-mil DIPS

DESCRIPTION

These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.The 54HC164 is characterized for operation over the full military temperature range of -55 〇C to 125 〇C. The 74HC164 is characterized for operation from -40〇C to 85 〇C